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BONFIGLIOLI Agile Applications Manual

BONFIGLIOLI Agile
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VPLC / PLC 6908/10
08/10 VPLC / PLC 69
4.6.5 [80,81,82] Clock generator Superior
Type Function
Type Function
I1
b S clock generator 1
O1
b output O1
I2
b Clock generator 2
O2
b
negated output O2 =
1O
I3
b Superior Set input
P1
t On-time (High)
I4
b Superior Reset input
P2
t
Off time (Low)
80 [ms], 81 [s] or 82 [min]
Description:
As long as input 1 is TRUE and input 2 is FALSE, the set pulse pattern is output. The pulse pat-
tern at the output always starts with TRUE. The clock pattern is defined by the on-time and the
off-time. The time set in P1 is the on-time (High) and the time set in P2 is the off-time (Low).
Via the output buffer, the output signal is globally available.
Inputs Superior Set and Superior Reset are connected in series with the function. Levels at Set
input I1 and Reset input I2 are processed internally. As soon as the Superior Set or Superior
Reset is reset, the output is switched to the internally saved value.
Clock generator
S
SS
SR
O1
Q
State
x x x 1 0 Off (Superior)
x X 1 0 1 On (Superior)
x 1 0 0 0 Off
0 x 0 0 0 Off
1 0 0 0 t1 1 Clock On
1 0 0 0 t2 0 Clock Off
P1
(on-time)
P2
(off-time)

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BONFIGLIOLI Agile Specifications

General IconGeneral
BrandBONFIGLIOLI
ModelAgile
CategoryDC Drives
LanguageEnglish

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