3 Overview of instructions
− C is a configurable constant value.
− V is a variable input value.
− P1 and P2 are input fields in the function block setup for adapting the function to the appli-
cation
Digital functions
0 -
Off (last table
item)
Return jump to Instruction 1 (in Index 1). Last function processed in
function table. See chapter 2.1.
Boolean operations Digital functions
1 - AND
Up to 4 inputs are AND combined with one another. Output is TRUE
if all inputs are TRUE. See chapter 0.
2 - OR
Up to 4 inputs are OR combined with one another. Output is logic
TRUE if at least one input is TRUE. See chapter 4.3.2.
3 - XOR (=1)
Up to 4 inputs are EXCLUSIVE OR-combined with one another. Out-
put is TRUE only if exactly one input is TRUE. See chapter 4.3.3.
4 - XOR (=1)||(=3)
Up to 4 inputs are EXCLUSIVE OR-combined with one another. The
output is TRUE if TRUE is present on an odd number of inputs. The
output is FALSE if TRUE is present on a straight number of inputs.
See chapter 4.3.4.
Flip-Flop types Digital functions
10 -
RS-Flip-Flop
Superior
Input 1: Set; TRUE sets output to TRUE.
Input 2: Reset; TRUE sets output to FALSE.
Input 3: Superior Set; TRUE sets output to TRUE.
Input 4: Superior Reset; TRUE sets output to FALSE.
FALSE at Set and Reset: Last output signal state is maintained. See
chapter 4.4.1.
20 -
Toggle Flip-Flop
Superior
Output signal changes with the positive pulse edge at input 1 or with
the negative pulse edge at input 2.
TRUE at Superior-Set input (input 3) sets output TRUE. TRUE at
Superior Reset input (input 4) sets output FALSE. See chapter 4.4.3.
30 -
D Flip-Flop Su-
perior
If a positive edge is received at input 1 (clock pulse input C, Clock)
the signal present at input 2 (data input D) is transferred to the out-
put.
TRUE at Superior-Set input (input 3) sets output TRUE. TRUE at
Superior Reset input (input 4) sets output FALSE. See chapter 4.4.5.
Delays Digital functions
40 -
Delay Superior
ms (retriggera-
ble)
The positive edge at input 1 is delayed by the time set in P1 and the
negative edge is delayed by the time set in P2 before switching them
through to the output. The delay time starts again with each edge.
Times are indicated in milliseconds [ms].
TRUE at Superior-Set input (input 3) sets output TRUE. TRUE at
Superior Reset input (input 4) sets output FALSE. See chapter 4.5.1.
41 -
Delay Superior s
(retriggerable)
As in operation mode 40, the unit of the times set in P1 and P2 is
seconds [s]. See chapter 4.5.1.
42 -
Delay Superior
min (retriggera-
ble)
As in operation mode 40, the unit of the times set in P1 and P2 is
minutes [min]. See chapter 4.5.1.
50 -
Delay Superior
ms (non-
retriggerable)
The positive edge at input 1 is delayed by the time set in P1 and the
negative edge is delayed by the time set in P2 before switching them
through to the output. During the delay time, edges will be ignored.
Times are indicated in milliseconds [ms].
TRUE at Superior-Set input (input 3) sets output TRUE. TRUE at
Superior Reset input (input 4) sets output FALSE. See chapter 4.5.3.
51 -
Delay Superior s
(non-
retriggerable)
As in operation mode 50, the unit of the times set in P1 and P2 is
seconds [s]. See chapter 4.5.3.
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