BONFIGLIOLI Agile Applications Manual

VPLC / PLC 08/10130
130 VPLC / PLC 08/10
Master Set sets all bits of the output value (Output = 0xFFFF).
Master Reset deletes all bits of the output value (Output = 0x0000).
Example
P2 I1 O1 O2
1) 1: One shift 0xF00F 0x7807 0x87F8
2) 4: Four shifts 0x00FF 0x000F 0xFFF0
3) 8: Eight shifts 0xFF00 0x00FF 0xFF00
In example 1):
5.11.6 [211] Bit arithmetical shift right
Type Function Type Function
I1 % input value 1 O1 %
I1 bitwise shifted by P2, sign
bit is maintained
I2 - - O2 % inverted output
I3 b Master Set P1 - -
I4 b Master Reset P2 i Number of shifts
Description:
The input value at I1 is shifted to the right bitwise by the number of shifts (P2). The most sig-
nificant bit (sign bit) is maintained.
Master Set sets all bits of the output value (Output = 0xFFFF).
Master Reset deletes all bits of the output value (Output = 0x0000).
Example
P2 I1 O1 O2
1) 1: One shift 0xF00F 0xF807 0x07F8
2) 4: Four shifts 0x00FF 0x000F 0xFFF0
3) 8: Eight shifts 0xFF00 0xFFFF 0x0000
In example 1):
5.11.7 [212] Bit shift left
Type Function Type Function
I1 % input value 1 O1 % I1 bitwise shifted by P2
I2 - - O2 % inverted output
I3 b Master Set P1 - -
I4 b Master Reset P2 i Number of shifts
Description:
The input value at I1 is shifted to the left bitwise by the number of shifts (P2). Right side is
filled with zeroes.
Master Set sets all bits of the output value (Output = 0xFFFF).
Master Reset deletes all bits of the output value (Output = 0x0000).

BONFIGLIOLI Agile Specifications

General

Brand	BONFIGLIOLI
Model	Agile
Category	DC Drives
Language	English