Bouffalo Lab BL702 - Page 175

BL702/704/706 Reference Manual
Bits
Name Type Reset Description
23:17 RSVD
16 RXECLR W1C 1’b0 Interrupt clear of irrx_end_int
15:9 RSVD
8 RXEMASK R/W 1’b1 Interrupt mask of irrx_end_int
7:1 RSVD
0 RXEINT R 1’b0 IRRX transfer end interrupt
8.4.17 irrx_pw_config
Address
：
0x4000a688
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RXETH
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RXDATH
Bits
Name Type Reset Description
31:16 RXETH R/W 16’d8999 Pulse width threshold to trigger END condition
15:0 RXDATH R/W 16’d3399 Pulse width threshold for Logic0/1 detection (Don’t care if
SWM is enabled)
8.4.18 irrx_data_count
Address：0x4000a690
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RSVD
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RSVD RXDACNT
Bits
Name Type Reset Description
31:7 RSVD
6:0 RXDACNT R 7’d0 RX data bit count (pulse-width count for SWM)
BL702/704/706 Reference Manual 175/ 375
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