Bouffalo Lab BL702 - Page 202

BL702/704/706 Reference Manual
Bits
Name Type Reset Description
31:9 RSVD
8 RLSEMASK R/W 1’b1 Interrupt mask of urx_lse_int
7 RFERMASK R/W 1’b1 Interrupt mask of urx_fer_int
6 TFERMASK R/W 1’b1 Interrupt mask of utx_fer_int
5 RPCEMASK R/W 1’b1 Interrupt mask of urx_pce_int
4 RRTOMASK R/W 1’b1 Interrupt mask of urx_rto_int
3 RFMS R/W 1’b1 Interrupt mask of urx_fifo_int
2 TFMS R/W 1’b1 Interrupt mask of utx_fifo_int
1 REMS R/W 1’b1 Interrupt mask of urx_end_int
0 TEMS R/W 1’b1 Interrupt mask of utx_end_int
10.4.11 uart_int_clear
Address：0x4000a028
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RSVD
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RSVD RLSE
CLR
RSVD RPCE
CLR
RRTO
CLR
RSVD RECL TECL
Bits
Name Type Reset Description
31:9 RSVD
8 RLSECLR W1C 1’b0 Interrupt clear of urx_lse_int
7:6 RSVD
5 RPCECLR W1C 1’b0 Interrupt clear of urx_pce_int
4 RRTOCLR W1C 1’b0 Interrupt clear of urx_rto_int
3:2 RSVD
1 RECL W1C 1’b0 Interrupt clear of urx_end_int
0 TECL W1C 1’b0 Interrupt clear of utx_end_int
BL702/704/706 Reference Manual 202/ 375
@2021 Bouffalo Lab
guest@bouffalolab