BL702/704/706 Reference Manual
time delay.
1. Enter sleep mode
The software can make this module enter the power-down mode through PDS configuration and wait for processing.
After entering the waiting interrupt mode (WFI), the PDS module will trigger the clock control module to enter the gate
clock operation and notify the analog circuit to turn off the PLL and external crystal oscillator.
2. Leave sleep mode
There are two ways to leave sleep mode. The first is that a specific interrupt or event interrupts the idle state during
sleep. The second is that the sleep time of PDS_TIM is set by software, and both will trigger the PDS module to
enter or leave low power consumption. mode. Note: Because it takes about 1ms to turn on the crystal oscillator, PDS
provides the software to turn on the crystal oscillator in advance. This approach can speed up the PDS to wake up.
When the PDS module is ready to wake up, the module will notify the processor to leave the wait for interrupt mode
(WFI) through an interrupt.
3. Data retention
When entering the sleep mode, the data in the OCRAM area can automatically enter the retention state and be
retained, and can exit the retention state automatically after waking up.
And in sleep mode, 4K HBN_RAM data will always be retained.
Sleep mode(HBN)
In the sleep mode, while retaining the AON (Always On) power supply, most of the chip logic is powered off (Vcore),
and the internal circuit will not be awakened until an external event is received.
In the sleep mode, it can achieve the ultimate power saving state, but the response time required compared with the
first two is also the longest. It is suitable for a state that does not need to work for a long time, and it can enter this
state to extend battery life.
During the sleep period, most of the circuits will be powered off, and the corresponding register values and memory
data will also disappear. Therefore, there is 4KB HBN_RAM inside the HBN. This memory will not be powered off
when it is in hibernation. The data or state that the software needs to save can be copied to this memory before
entering hibernation. When resuming from hibernation, it can be accessed directly from RAM. Data, usually can be
used as a state record or quick data recovery (only HBN0 is valid).
19.4 Register description
Name
Description
HBN_CTL HBN control
HBN_TIME_L RTC timer compare
HBN_TIME_H RTC timer compare
BL702/704/706 Reference Manual 353/ 375
@2021 Bouffalo Lab
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