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Intel Embedded Intel486 - Page 122

Intel Embedded Intel486
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EMBEDDED Intel486 PROCESSOR HARDWARE REFERENCE MANUAL
4-58
AHOLD Snoop Overlaying a Non-Burst Cycle
When AHOLD overlays a non-burst cycle, snooping is based on the completion of the current
non-burst transfer (ADS#-RDY# transfer). Figure 4-40 shows a snoop cycle under AHOLD over-
laying a non-burst line-fill cycle. HITM# is asserted two clocks after EADS#, and the non-burst
cycle is fractured after the RDY# for a specific single transfer is asserted. The snoop write-back
cycle is re-ordered ahead of an ongoing non-burst cycle. After the write-back cycle is completed,
the fractured non-burst cycle continues. The snoop write-back ALWAYS precedes the comple-
tion of a fractured cycle, regardless of the point at which AHOLD is de-asserted, and AHOLD
must be de-asserted before the fractured non-burst cycle can complete.
Figure 4-40. Snoop Cycle Overlaying a Non-Burst Cycle
242202-152
CLK
AHOLD
EADS#
INV
HITM#
ADS#
A31–A4
BLAST#
To Processor
Write-back from Processor
1234567891011121314151617181920212223
A3–A2 0 0 4 8 C 4 8 C
RDY#
CACHE#
W/R#
Fill
Fill Cont.

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