Contents
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EDSVS9332S-D11 EN 3.0
9 Function library 9-39.......................................................
9.1 Working with function blocks 9-39.....................................................
9.1.1 Signal types 9-39.........................................................
9.1.2 Elements of a function block 9-40.............................................
9.1.3 Connection of function blocks 9-42.............................................
9.1.4 Entries into the processing table 9-46...........................................
9.2 Function blocks 9-48...............................................................
9.2.1 Table of the function blocks 9-48..............................................
9.2.2 Table of the free control codes 9-50............................................
9.2.3 Absolute value generator (ABS) 9-51............................................
9.2.4 Addition block (ADD) 9-52...................................................
9.2.5 Automation interface (AIF-IN) 9-53.............................................
9.2.6 Automation interface (AIF-OUT) 9-56............................................
9.2.7 Analog input via terminal 1,2/3,4 (AIN) 9-58......................................
9.2.8 AND operation (AND) 9-60...................................................
9.2.9 Inverter (ANEG) 9-64.......................................................
9.2.10 Analog output via terminal 62/63 (AOUT) 9-65.....................................
9.2.11 Arithmetic block (ARIT) 9-67..................................................
9.2.12 Arithmetic block (ARITPH) 9-68................................................
9.2.13 Changeover switch for analog signals (ASW) 9-69..................................
9.2.14 Holding brake (BRK) 9-71....................................................
9.2.15 System bus (CAN-IN) 9-76...................................................
9.2.16 System bus (CAN-OUT) 9-77.................................................
9.2.17 Comparator (CMP) 9-78.....................................................
9.2.18 Signal conversion (CONV) 9-82................................................
9.2.19 Phase conversion (CONVPHA) 9-85.............................................
9.2.20 Phase conversion (CONVPHPH) 9-86............................................
9.2.21 Speed conversion (CONVPP) 9-87..............................................
9.2.22 Characteristic function (CURVE) 9-88...........................................
9.2.23 Dead band (DB) 9-91.......................................................
9.2.24 Control of the drive controller (DCTRL) 9-92......................................
9.2.25 Master frequency input (DFIN) 9-97............................................
9.2.26 Digital frequency output (DFOUT) 9-100..........................................
9.2.27 Digital frequency ramp function generator (DFRFG) 9-104.............................
9.2.28 Digital frequency processing (DFSET) 9-110.......................................
9.2.29 Delay elements (DIGDEL) 9-115................................................
9.2.30 Freely assignable digital inputs (DIGIN) 9-118......................................
9.2.31 Freely assignable digital outputs (DIGOUT) 9-119....................................
9.2.32 First order derivative-action element (DT1) 9-120...................................
9.2.33 Free piece counter (FCNT) 9-121...............................................
9.2.34 Free digital outputs (FDO) 9-122................................................
9.2.35 Freely assignable input variables (FEVAN) 9-124....................................
9.2.36 Fixed setpoints (FIXSET) 9-129.................................................
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