7-ii Issue 3 June 2001
Table of Contents
TG Hardware Settings 7-21
TG Quick Reference Summary 7-24
Transmission - Electrical Interface 7-25
■ BBF1/BBF1B DS1 Circuit Pack Description 7-25
Purpose of Circuit 7-25
DS1 Faceplate Indicator 7-25
General Description of Operation 7-27
Detailed Description of Operation 7-27
DS1 Hardware Settings 7-31
DS1 Quick Reference Summary 7-32
■ BBF3/BBF3B DS1PM Circuit Pack Description 7-33
Purpose of Circuit 7-33
DS1PM Faceplate Indicator 7-33
General Description of Operation 7-35
Detailed Description of Operation 7-35
DS1PM Hardware Settings 7-39
DS1PM Quick Reference Summary 7-40
■ 177A Retainer Card Description 7-41
Purpose of Card 7-41
■ BBF5 Jumper Circuit Pack Description 7-43
Purpose of Circuit 7-43
■ BBF8 High bit rate Digital Subscriber Line 7-44
Purpose of Circuit 7-44
HDSL Faceplate Indicator 7-44
General Description of Operation 7-45
Detailed Description of Operation 7-45
HDSL Quick Reference Summary 7-52
■ BBF9/BBF10 IMA LAN Circuit Pack Description 7-53
Purpose of Circuit 7-53
IMA LAN Faceplate Indicator 7-53
LAN Interface (BBF9) 7-54
LAN Interface (BBF10) 7-55
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