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NXP Semiconductors MKL25Z128VLK4 - Page 198

NXP Semiconductors MKL25Z128VLK4
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SIM_SOPT4 field descriptions (continued)
Field Description
0 TPM1 external clock driven by TPM_CLKIN0 pin.
1 TPM1 external clock driven by TPM_CLKIN1 pin.
24
TPM0CLKSEL
TPM0 External Clock Pin Select
Selects the external pin used to drive the clock to the TPM0 module.
NOTE: The selected pin must also be configured for the TPM external clock function through the
appropriate pin control register in the port control module.
0 TPM0 external clock driven by TPM_CLKIN0 pin.
1 TPM0 external clock driven by TPM_CLKIN1 pin.
23–21
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
20
TPM2CH0SRC
TPM2 channel 0 input capture source select
Selects the source for TPM2 channel 0 input capture.
NOTE: When TPM2 is not in input capture mode, clear this field.
0 TPM2_CH0 signal
1 CMP0 output
19
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
18
TPM1CH0SRC
TPM1 channel 0 input capture source select
Selects the source for TPM1 channel 0 input capture.
NOTE: When TPM1 is not in input capture mode, clear this field.
0 TPM1_CH0 signal
1 CMP0 output
17–0
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
Memory map and register definition
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
198 Freescale Semiconductor, Inc.

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