NXP Semiconductors MKL25Z128VLK4 - UART Status Register 1 (Uartx_S1)

UARTx_C2 field descriptions (continued)
Field Description
0 Normal transmitter operation.
1 Queue break character(s) to be sent.
40.2.5 UART Status Register 1 (UARTx_S1)
This register has eight read-only status flags. Writes have no effect. Special software
sequences, which do not involve writing to this register, clear these status flags.
Address: Base address + h offset
Bit 7 6 5 4 3 2 1 0
Read TDRE TC RDRF IDLE OR NF FE PF
Write
Reset
1 1 0 0 0 0 0 0
UARTx_S1 field descriptions
Field Description
7
TDRE
Transmit Data Register Empty Flag
TDRE is set out of reset and when a transmit data value transfers from the transmit data buffer to the
transmit shifter, leaving room for a new character in the buffer. To clear TDRE, read UART_S1 with TDRE
set and then write to the UART data register (UART_D).
0 Transmit data register (buffer) full.
1 Transmit data register (buffer) empty.
6
TC
Transmission Complete Flag
TC is set out of reset and when TDRE is set and no data, preamble, or break character is being
transmitted.
TC is cleared automatically by reading UART_S1 with TC set and then doing one of the following:
• Write to the UART data register (UART_D) to transmit new data
• Queue a preamble by changing TE from 0 to 1
• Queue a break character by writing 1 to UART_C2[SBK]
0 Transmitter active (sending data, a preamble, or a break).
1 Transmitter idle (transmission activity complete).
5
RDRF
Receive Data Register Full Flag
RDRF becomes set when a character transfers from the receive shifter into the receive data register
(UART_D). To clear RDRF, read UART_S1 with RDRF set and then read the UART data register
(UART_D).
0 Receive data register empty.
1 Receive data register full.
4
IDLE
Idle Line Flag
IDLE is set when the UART receive line becomes idle for a full character time after a period of activity.
When ILT is cleared, the receiver starts counting idle bit times after the start bit. If the receive character is
Table continues on the next page...
Chapter 40 Universal Asynchronous Receiver/Transmitter (UART1 and UART2)
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
Freescale Semiconductor, Inc. 755