Omron CQM1H - PROGRAM User Manual

246
Timer and Counter Instructions Section 5-16
and comparison starts with the next target value. When all target values in the
comparison table have been matched and interrupts for them generated, the
target value is reset to the first target value in the table and the operation is
repeated.
Range Comparison
A range comparison table contains 8 ranges which are defined by an 8-digit
lower limit and an 8-digit upper limit, as well as their corresponding subroutine
numbers. The corresponding subroutine is called and executed when the PV
falls within a given range. (When interrupt processing is not required, an
undefined subroutine number may be entered.)
Always set 8 ranges. If fewer than 8 ranges are needed, set the remaining
subroutine numbers to FFFF. If more than 8 ranges are needed, another com-
parison instruction such as BCMP(68) can be used to compare ranges with
the high-speed counter PVs in IR 230 through IR 235. Bear in mind that these
words are refreshed just once each cycle.
There are flags in the AR area which indicate when a high-speed counter’s PV
falls within one or more of the 8 ranges. The flags turn ON when a PV is within
the corresponding range.
The following diagram shows the structure of a range comparison table for
use with the CPU Unit’s built-in high-speed counter 0 or the Pulse I/O Board’s
high-speed counters 1 or 2 set for linear counting.
The following diagram shows the structure of a range comparison table for
use with the Pulse I/O Board’s high-speed counters 1 or 2 set for ring count-
ing. The ring value specifies the number of points in the ring and the maxi-
mum count value (ring value = max. count value+1); the setting range fro the
Counter AR area flags
High-speed counter 0 AR 1100 to AR 1107 correspond to ranges 1 to 8.
High-speed counter 1 AR 0500 to AR 0507 correspond to ranges 1 to 8.
High-speed counter 2 AR 0600 to AR 0607 correspond to ranges 1 to 8.
High-speed counter PV
Execute subroutine.
Execute subroutine.
Execute subroutine.
•
•
•
•
•
•
Within
range
Lower limit 1 ↔ Upper limit 1
Lower limit 2 ↔ Upper limit 2
Lower limit 8 ↔ Upper limit 8
TB Lower limit #1, lower 4 digits (BCD)
TB+1 Lower limit #1, upper 4 digits (BCD)
TB+2 Upper limit #1, lower 4 digits (BCD)
TB+3 Upper limit #1, upper 4 digits (BCD)
TB+4 Subroutine number (See note 1.)
TB+35 Lower limit #8, lower 4 digits (BCD)
TB+36 Lower limit #8, upper 4 digits (BCD)
TB+37 Upper limit #8, lower 4 digits (BCD)
TB+38 Upper limit #8, upper 4 digits (BCD)
TB+39 Subroutine number (See note 1.)
First range setting
Eighth range setting

Omron CQM1H - PROGRAM Specifications

General

I/O Capacity	Up to 512 points
Power Supply	100 to 240 VAC, 50/60 Hz or 24 VDC (depending on model)
Instruction Set	Basic and advanced instructions
Operating Temperature	0 to 55°C
Program Capacity	7.2K to 15.2K steps
Communication Ports	RS-232C
Expansion Slots	Up to 3 expansion units
Type	Programmable Logic Controller (PLC)
CPU Type	RISC
Program Memory	7.2K to 15.2K steps
I/O Points	512 max
Expansion Capability	Up to 3 expansion units
Data Memory	RAM (battery backup)

Summary

PRECAUTIONS

1 Intended Audience

Specifies the target personnel for this manual, requiring knowledge of electrical systems and FA systems.

2 General Precautions

Outlines user responsibilities for operating the product according to specifications and consulting representatives for specific applications.

3 Safety Precautions

Details critical safety warnings related to I/O refreshing, touching internal components, disassembly, and power supply handling.

5 Application Precautions

Provides essential safety guidelines for using the PC System, including grounding, power handling, and unit mounting.

SECTION 1 PC Setup and Other Features

1-1 PC Setup

Explains operating parameters for CQM1H control, including default values and how to change them.

SECTION 2 Inner Boards

2-1 High-speed Counter Board

Describes the functions, input modes, comparison operations, and external outputs of the High-speed Counter Board.

2-2 Pulse I/O Board

Details the Pulse I/O Board's support for two pulse inputs and two pulse outputs, including input modes and interrupts.

SECTION 3 Memory Areas

3-1 Memory Area Structure

Explains the memory areas used by the CQM1H PC, including IR, Work, Controller Link status, MACRO operand, Inner Board, Analog, High-speed Counter, and EM areas.

SECTION 4 Ladder-diagram Programming

4-1 Basic Procedure

Outlines the fundamental steps for writing a program, including obtaining I/O lists and drawing ladder diagrams.

4-4 Controlling Bit Status

Details instructions for controlling individual bit status: OUTPUT, OUTPUT NOT, SET, RESET, DIFFERENTIATE UP/DOWN, KEEP.

4-6 Programming Precautions

Provides essential precautions for drawing clear ladder diagrams and inputting programs, emphasizing instruction order and TR bits.

4-7 Program Execution

Describes the CPU Unit's program scan from top to bottom, checking conditions, and executing instructions.

SECTION 5 Instruction Set

SECTION 6 Host Link Commands

6-1 Host Link Command Summary

Provides a summary table of Host Link commands available for CQM1H communications.

6-4 Command and Response Formats

Details the formats for commands issued from the host computer and responses received from the PC.

6-5 Host Link Commands

Lists and describes various Host Link commands for reading and writing data in IR, SR, LR, HR, DM, EM, and AR areas.

SECTION 7 CPU Unit Operation and Processing Time

7-1 CPU Unit Operation

Explains the overall operation flowchart of the CQM1H CPU Unit and defines cycle time.

7-2 Power Interruptions

Details the CPU Unit's behavior during power interruptions and momentary power supply failures.

7-3 Cycle Time

Explains the processes involved in a single execution cycle and their respective processing times.

SECTION 8 Troubleshooting

8-2 Programming Console Operation Errors

Lists common error messages encountered when using the Programming Console and their appropriate responses.

8-3 Programming Errors

8-5 Operating Errors

8-6 Error Log

8-7 Troubleshooting Flowcharts

Appendix A Programming Instructions

5-8 Ladder Diagram Instructions

Explains basic instructions like LOAD, AND, OR, and their combinations, including logic block instructions.

5-9 Bit Control Instructions

Covers instructions for controlling individual bit status: OUT, OUT NOT, SET, RESET, DIFU, DIFD, KEEP.

5-14 User Error Instructions: FAILURE ALARM AND RESET – FAL(06) and SEVERE FAILURE ALARM – FALS(07)

Describes instructions for outputting error numbers for operation, maintenance, and debugging, including non-fatal and fatal errors.

5-16 Timer and Counter Instructions

Details instructions for managing timers and counters, including TIM, TIMH, CNT, CNTR, TTIM, STIM, and CTBL.

5-29 Network Instructions

Explains instructions for communicating with other PCs via the Controller Link System, including SEND, RECV, and CMND.

5-30 Communications Instructions

Details instructions for serial communications, including RECEIVE (RXD), TRANSMIT (TXD), CHANGE SERIAL PORT SETUP (STUP), and PROTOCOL MACRO (PMCR).