RL78/F13, F14 CHAPTER 15 SERIAL ARRAY UNIT
R01UH0368EJ0210 Rev.2.10 968
Dec 10, 2015
(4) Processing flow (in continuous transmission mode)
Figure 15-127. Timing Chart of UART Transmission (in Continuous Transmission Mode)
Note If transmit data is written to the SDRmn register while the BFFmn bit of serial status register mn (SSRmn) is
1 (valid data is stored in serial data register mn (SDRmn)), the transmit data is overwritten.
Caution The MDmn0 bit of serial mode register mn (SSRmn) can be rewritten even during operation.
However, rewrite it before transfer of the last bit is started, so that it will be rewritten before the
transfer end interrupt of the last transmit data.
Remark m: Unit number (m = 0, 1), n: Channel number (n = 0), q: UART number (q = 0, 1)
mn = 00, 10
SSmn
SEmn
SDRmn
TxDq pin
Shift
register mn
INTSTq
TSFmn
P
ST ST
P
ST
P
SP
BFFmn
MDmn0
STmn
SP
SP
Data transmission (7-bit length)
Data transmission (7-bit length)
Transmit data 1
Transmit data 2
Transmit data 3
Transmit data 3
Transmit data 2
Transmit data 1
Shift operation
Shift operation
Shift operation
<1>
<2>
<2>
<3>
(Note)
<2>
<3>
<5><3>
<4>
Data transmission (7-bit length)
<6>
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