RL78/F13, F14 CHAPTER 21 INTERRUPT FUNCTIONS
R01UH0368EJ0210 Rev.2.10 1485
Dec 10, 2015
Table 21-2. Flags Corresponding to Interrupt Request Sources (2/4)
Interrupt
Source
Interrupt Request Flag Interrupt Mask Flag Priority Specification Flag
100-pin
80-pin
64-pin
48-pin
32-pin
30-pin
20-pin
Register Register Register
INTP13 PIF13 IF0H PMK13 MK0H PPR013, PPR113 PR00H,
PR10H

Note

Note
ï€ ï€ ï€ ï€ ï€
INTCLM CLMIF CLMMK CLMPR0, CLMPR1
      
INTST0 STIF0 STMK0
STPR00, STPR10
      
INTCSI00 IICIF00 CSIMK00
CSIPR000, CSIPR100
      
INTIIC00 IICIF00 IICMK00 IICPR000, IICPR100
      
INTSR0 SRIF0 SRMK0
SRPR00, SRPR10
      
INTCSI01 CSIIF01 CSIMK01
CSIPR001, CSIPR101
      
INTIIC01 IICIF01 IICMK01 IICPR001, IICPR101
      
INTTRD0 TRDIF0 TRDMK0
TRDPR00, TRDPR10
      
INTTRD1 TRDIF1 TRDMK1
TRDPR01, TRDPR11
      
INTTRJ0 TRJIF0 TRJMK0
TRJPR00, TRJPR10
      
INTRAM RAMIF RAMKK
RMAMPR0, RAMPR1
      
INTLIN0TRM LIN0TRMIF LIN0TRMMK
LIN0TRMPR0,
LIN0TRMPR1
      
Cautions 1. If one of the interrupt sources INTST0, INTCSI00, and INTIIC00 is generated, bit 1 of the IF0H
register is set to 1. Bit 1 of the MK0H, PR00H, and PR10H registers supports these three interrupt
sources.
2. If one of the interrupt sources INTSR0, INTCSI01, and INTIIC01 is generated, bit 2 of the IF0H
register is set to 1. Bit 2 of the MK0H, PR00H, and PR10H registers supports these three interrupt
sources.
Note Provided only in Group E products.
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