RL78/F13, F14 CHAPTER 21 INTERRUPT FUNCTIONS
R01UH0368EJ0210 Rev.2.10 1487
Dec 10, 2015
Cautions 1. Do not use INTP6 and channel 1 of TAU1 (at 8-bit timer operation) at the same time because they
share flags for the interrupt request sources. Whether the interrupt source condition that is
satisfied is INTP6 or channel 1 of TAU1, bit 1 of the IF1H register is set to 1. Bit 1 of the MK1H,
PR01H, and PR11H registers supports these two interrupt sources.
2. Do not use INTP7 and channel 3 of TAU1 (at 8-bit timer operation) at the same time because they
share flags for the interrupt request sources. Whether the interrupt source condition that is
satisfied is INTP7 or channel 3 of TAU1, bit 2 of the IF1H register is set to 1. Bit 2 of the MK1H,
PR01H, and PR11H registers supports these two interrupt sources.
3. Do not use INTP9 and channel 1 of TAU0 (at 8-bit timer operation) at the same time because they
share flags for the interrupt request sources. Whether the interrupt source condition that is
satisfied is INTP6 or channel 1 of TAU0, bit 3 of the IF1H register is set to 1. Bit 3 of the MK1H,
PR01H, and PR11H registers supports these two interrupt sources.
4. Do not use INTP10 and channel 3 of TAU0 (at 8-bit timer operation) at the same time because they
share flags for the interrupt request sources. Whether the interrupt source condition that is
satisfied is INTP6 or channel 3 of TAU0, bit 4 of the IF1H register is set to 1. Bit 4 of the MK1H,
PR01H, and PR11H registers supports these two interrupt sources.
5. If one of the interrupt sources INTST1, INTCSI10, and INTIIC10 is generated, bit 5 of the IF1H register
is set to 1. Bit 5 of the MK1H, PR01H, and PR11H registers supports these three interrupt sources.
6. If one of the interrupt sources INTSR1, INTCSI11, and INTIIC11 is generated, bit 6 of the IF1H
register is set to 1. Bit 6 of the MK1H, PR01H, and PR11H registers supports these three interrupt
sources.
Note Not provided in Group A products.
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