Registers
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Table 25-25. Registers That Should Be Updated From Their Default Value, Bit Rate 2 Mbps
(continued)
Register Name Address (Hex) Rx Tasks Tx Tasks Description
619B 5A 5A Prescaler and mixer currents
FSCTRL
61A2 66 66 Reduce ADC gain
ADCTEST0
Select dc offset compensation method;
61A5 0F 01
MDMTEST0
change RSSI averaging
61BC 03 03 Transmit filter bandwidth
TXFILTCFG
6003 06 06 Enable AGC and start tone
PRF_PKT_CONF
Set 1-MHz Tx IF and dc write-back; for Tx
607E 90 D0
PRF_RADIO_CONF
tasks also special dc offset compensation
6186 E1 E1 Tx power (0 dBm)
TXPOWER
6187 19 19 DAC current
TXCTRL
6265 1B 1B PA, mixer, and DAC bias
IVCTRL
The values for FRMCTRL0, MDMCTRL2, and PRF_PKT_CONF may require further adjustment based on the
frame format, and the correlation threshold in MDMCTRL1 should be adjusted according to the sync word
length, see Section 25.7.
In addition to these modifications, registers must be set in order to set up the modulation format, packet
handling, etc., as explained throughout this chapter.
25.12.3 SFR Register Descriptions
RFIRQF0 (0xE9) – RF Interrupt Flags
Bit
Name Reset R/W Description
No.
7:4 – 0000 R0 Reserved
3
RXTHSHUP
0 R/W0 Rx FIFO goes above its upper threshold.
0: No interrupt pending
1: Interrupt pending
2
TXTHSHUP
0 R/W0 Tx FIFO goes above its upper threshold.
0: No interrupt pending
1: Interrupt pending
1
RXTHSHDN
0 R/W0 Rx FIFO goes below its lower threshold.
0: No interrupt pending
1: Interrupt pending
0
TXTHSHDN
0 R/W0 Tx FIFO goes below its lower threshold.
0: No interrupt pending
1: Interrupt pending
334
CC2541 Proprietary Mode Radio SWRU191C– April 2009–Revised January 2012
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