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12.2.1 ADC Inputs ...................................................................................................... 138
12.2.2 ADC Conversion Sequences ................................................................................. 139
12.2.3 Single ADC Conversion ....................................................................................... 139
12.2.4 ADC Operating Modes ........................................................................................ 139
12.2.5 ADC Conversion Results ..................................................................................... 140
12.2.6 ADC Reference Voltage ...................................................................................... 140
12.2.7 ADC Conversion Timing ...................................................................................... 140
12.2.8 ADC Interrupts ................................................................................................. 140
12.2.9 ADC DMA Triggers ............................................................................................ 140
12.2.10 ADC Registers ................................................................................................ 141
13 Battery Monitor ................................................................................................................ 145
13.1 Functionality and Usage of the Battery Monitor ...................................................................... 146
13.2 Using the Battery Monitor for Temperature Monitoring ............................................................. 146
13.3 Battery Monitor Registers ............................................................................................... 147
14 Random-Number Generator .............................................................................................. 149
14.1 Introduction ............................................................................................................... 150
14.2 Random-Number-Generator Operation ............................................................................... 150
14.2.1 Pseudorandom Sequence Generation ...................................................................... 150
14.2.2 Seeding ......................................................................................................... 150
14.2.3 CRC16 ........................................................................................................... 150
14.3 Random-Number-Generator Registers ................................................................................ 151
15 AES Coprocessor ............................................................................................................ 153
15.1 AES Operation ........................................................................................................... 154
15.2 Key and IV ................................................................................................................ 154
15.3 Padding of Input Data ................................................................................................... 154
15.4 Interface to CPU ......................................................................................................... 154
15.5 Modes of Operation ...................................................................................................... 154
15.6 CBC-MAC ................................................................................................................. 154
15.7 CCM Mode ................................................................................................................ 155
15.8 AES Interrupts ............................................................................................................ 157
15.9 AES DMA Triggers ....................................................................................................... 157
15.10 AES Registers ............................................................................................................ 157
16 Watchdog Timer .............................................................................................................. 159
16.1 Watchdog Mode .......................................................................................................... 160
16.2 Timer Mode ............................................................................................................... 160
16.3 Watchdog Timer Register ............................................................................................... 160
17 USART ............................................................................................................................ 163
17.1 UART Mode ............................................................................................................... 164
17.1.1 UART Transmit ................................................................................................. 164
17.1.2 UART Receive ................................................................................................. 164
17.1.3 UART Hardware Flow Control ................................................................................ 164
17.1.4 UART Character Format ...................................................................................... 165
17.2 SPI Mode .................................................................................................................. 165
17.2.1 SPI Master Operation ......................................................................................... 165
17.2.2 SPI Slave Operation ........................................................................................... 166
17.3 SSN Slave-Select Pin ................................................................................................... 166
17.4 Baud-Rate Generation .................................................................................................. 166
17.5 USART Flushing ......................................................................................................... 167
17.6 USART Interrupts ........................................................................................................ 167
17.7 USART DMA Triggers ................................................................................................... 167
17.8 USART Registers ........................................................................................................ 167
18 Operational Amplifier ....................................................................................................... 173
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Contents SWRU191C–April 2009–Revised January 2012
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