ABB ACS880 N5700 Series - Page 249

Def / Type
FbEq 16b / 32b
DescriptionName / Range /
Selection
No.
See Terms and abbreviations (page 130).Other [bit]
Selected / uint32Selects the source of the positive speed enable
command.
1 = Positive speed enabled.
0 = Positive speed interpreted as zero speed reference.
In the figure below, 23.1 Speed ref ramp input is set to
zero after the positive speed enable signal has cleared.
Actions in different control modes:
Speed control: Speed reference is set to zero and the
motor ramps down along the currently active
deceleration ramp. The drive keeps modulating. The
rush controller prevents additional torque terms from
running the motor in the positive direction.
Torque control: The rush controller monitors the
rotation direction of the motor.
20.23 Positive speed enable
20.24 Negative speed enable
23.01 Speed ref ramp input
01.01 Motor speed used
Positive speed
enable
20.23
00Not selected
11Selected
2Digital input DI1 (10.2 DI delayed status, bit 0).DI1
3Digital input DI2 (10.2 DI delayed status, bit 1).DI2
4Digital input DI3 (10.2 DI delayed status, bit 2).DI3
5Digital input DI4 (10.2 DI delayed status, bit 3).DI4
6Digital input DI5 (10.2 DI delayed status, bit 4).DI5
7Digital input DI6 (10.2 DI delayed status, bit 5).DI6
10Digital input/output DIO1 (11.2 DIO delayed status, bit
0).
DIO1
11Digital input/output DIO2 (11.2 DIO delayed status, bit
1).
DIO2
See Terms and abbreviations (page 130).Other [bit]
Selected / uint32Selects the source of the negative speed reference
enable command. See parameter 20.23 Positive speed
enable.
Negative speed
enable
20.24
Parameters 249