Parameters and firmware blocks
261
91.01 SINE COSINE NR FW block: ABSOL ENC CONF (see above)
Defines the number of sine/cosine wave cycles within one revolution.
Note: This parameter does not need to be set when EnDat or SSI encoders are used in continuous
mode. See parameter 91.25 SSI MODE / 91.30 ENDAT MODE.
0…65535 Number of sine/cosine wave cycles within one revolution.
91.02 ABS ENC INTERF FW block: ABSOL ENC CONF (see above)
Selects the source for the encoder absolute position.
(0) None Not selected.
(1) Commut sig Commutation signals.
(2) EnDat Serial interface: EnDat encoder.
(3) Hiperface Serial interface: HIPERFACE encoder.
(4) SSI Serial interface: SSI encoder.
(5) Tamag.17/33 bits Serial interface: Tamagawa 17/33-bit encoder.
91.03 REV COUNT BITS FW block: ABSOL ENC CONF (see above)
Defines the number of bits used in revolution counting with multiturn encoders. Used when parameter
91.02 ABS ENC INTERF is set to (2) EnDat, (3) Hiperface or (4) SSI. When 91.02 ABS ENC INTERF
is set to (5) Tamag.17/33 bits), setting this parameter to a non-zero value activates multiturn data
requesting.
0…32 Number of bits used in revolution count. Eg, 4096 revolutions => 12
bits.
91.04 POS DATA BITS FW block: ABSOL ENC CONF (see above)
Defines the number of bits used within one revolution when parameter 91.02 ABS ENC INTERF is set
to (2) EnDat, (3) Hiperface or (4) SSI. When 91.02 ABS ENC INTERF is set to (5) Tamag.17/33 bits,
this parameter is internally set to 17.
0…32 Number of bits used within one revolution. Eg, 32768 positions per
revolution => 15 bits.
91.05 REFMARK ENA FW block: ABSOL ENC CONF (see above)
Enables the encoder zero pulse for the absolute encoder input (X42) of an FEN-11 module (if
present). Zero pulse can be used for position latching.
Note: With serial interfaces (ie, when parameter 91.02 ABS ENC INTERF is set to (2) EnDat, (3)
Hiperface, (4) SSI or (5) Tamag.17/33 bits), the zero pulse does not exist.
(0) FALSE Zero pulse disabled.
(1) TRUE Zero pulse enabled.