Titanium Interfaces User Guide
Create an LVDS RX Interface.................................................................................................................77
Design Check: LVDS Errors and Warnings..........................................................................................78
Chapter7:HyperRAM Interface.................................................................................................... 86
About the HyperRAM..............................................................................................................................86
Using the HyperRAM Interface............................................................................................................. 87
Chapter8:JTAG User TAP Interface............................................................................................. 89
JTAG Mode.............................................................................................................................................. 89
Using the JTAG User TAP Block........................................................................................................... 92
Design Check: JTAG User Tap Errors and Warnings.........................................................................93
Chapter9:MIPI RX/TX Lane Interface.......................................................................................... 94
HSIO Configured as MIPI Lane...............................................................................................................94
MIPI Groups by Package........................................................................................................................99
Using the MIPI TX Lane or MIPI RX Lane Block................................................................................103
Create a MIPI TX Interface...................................................................................................................104
Create a MIPI RX Interface.................................................................................................................. 106
Design Check: MIPI Lane Messages.................................................................................................. 107
Chapter10:MIPI D-PHY Interface...............................................................................................110
MIPI RX D-PHY.......................................................................................................................................110
MIPI TX D-PHY.......................................................................................................................................113
MIPI DPHY TX Interface Designer Settings....................................................................................... 117
MIPI DPHY RX Interface Designer Settings.......................................................................................119
Chapter11:PLL........................................................................................................................... 121
About the PLL Interface........................................................................................................................ 121
Using the PLL V3 Block........................................................................................................................123
Using the PLL Clock Calculator...............................................................................................123
Understanding PLL Phase Shifting..........................................................................................124
Manually Configuring the PLL................................................................................................. 124
Implementing a Zero-Delay Buffer.....................................................................................................125
Design Check: PLL Errors.................................................................................................................... 126
Chapter12:Oscillator................................................................................................................. 131
Using the Oscillator Block................................................................................................................... 131
Design Check: Oscillator Errors......................................................................................................... 131
Chapter13:SPI Flash Interface...................................................................................................133
About the SPI Flash Memory...............................................................................................................133
Using the SPI Flash Interface.............................................................................................................. 134
Chapter14:Interface Floorplans................................................................................................ 135
Icon Reference.............................................................................................................................137
Revision History.......................................................................................................................... 138
www.efinixinc.com