Efinix Titanium - About the Interface Designer

Titanium Interfaces User Guide
About the Interface Designer
Titanium FPGAs wrap a Quantum
™
-accelerated core with a periphery that sends signals
out to the device pins. The core contains the logic, embedded memory, and multipliers. The
device periphery includes blocks such as GPIO pins, LVDS, MIPI, DDR, and PLLs.
The tools in the Efinity
®
main window help you design the logic portion of your design. You
use the Efinity Interface Designer to build the peripheral portion of your design.
Figure 1: Conceptual View of Interface Blocks
Embedded Memory
Multiplier
Note: The number and locations of blocks
are shown for illustration purposes only.
The actual number and position depends
on the device.
Interface Blocks:
Use the Efinity Interface Designer to create and
define these blocks and to connect them to
your RTL design via the signal interface.
Programmable Core Fabric:
Create your RTL design for the core fabric
using Efinity design tools.
Signal Interface:
Connects the core fabric to the interface blocks
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