Section 9: Verifying the Model 9500B Accuracy Specification 9-25
Final Width = 215mm
Verif Nominal Output Measured Specification User's Total Flatness Validity Tolerance Measured p-p
Point. Output Frequency p-p Voltage Relative to Measurement Limits Voltage for
Voltage at 50kHz 50kHz Uncertainty Flatness
(% of Output) (Um) Lower Higher Check
Ref 1 3V 50kHz
SF01 10MHz ±2.0
SF02 50MHz ±2.0
SF03 100MHz ±2.0
SF04 250MHz ±2.0
SF05 400MHz ±2.5
SF06 550MHz ±2.5
SF07 600MHz ±3.5
SF08
†
725MHz ±3.5
SF09
†
1GHz ±3.5
SF10
††
1.5GHz ±4.0
SF11
††
2GHz ±4.0
SF12
††
2.5GHz ±4.0
Table 9.9.2.1 Sine Flatness Verification at 3V p-p into 50
Ω
Load
Please copy the following table. Enter the measurements in the Measured Value column on the copy:
Additional verification points for: 9500B/1100 & 9500B/3200 (†); and 9500B/3200 ( ††).
9.9.2.7 Uncertainty Calculations and Flatness Check
All Tables a. Insert the User's Measurement Uncertainty
(Um), for each of the verification points in the
tables.
b. For each of the verification points: Combine
the Total Measurement Uncertainty and the
9500B Sine function accuracy, using the RSS
method, to calculate the Flatness Validity
Tolerance Limits. For further assistance, refer
to sub-section 9.9.2.6.
c. Enter the limits in the appropriate columns of
the copy of the Table.
d. Check that the Measured p-p Voltage is at or
between the Flatness Validity Tolerance Limits.
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