Huawei RH8100 V3 - Page 138

Table 5-3 DIMM conguration rules
CPU DIMM Installation Sequence
Each CPU J1, J4, J7, J10, J2, J5, J8, J11, J3, J6, J9, and J12
● If each memory board supports eight DIMMs, the RH8100 V3 supports 128
DDR3 or DDR4 DIMMs. Each memory board provides four memory channels:
0, 1, 2, and 3. Figure 5-16 shows the internal structure of a memory board
with 8 DIMMs, and Table 5-4 lists the memory channels.
Figure 5-16 Internal structure of a memory board with 8 DIMMs
Table 5-4 Memory channels
Memory
Channel
Composition Primary Slot
Channel 0 J1 J1
J2
Channel 1 J4 J4
J5
Channel 2 J7 J7
J8
Channel 3 J10 J10
J11
Table 5-5 describes DIMM
conguration rules.
RH8100 V3 Server
User Guide 5 Removing and Installing Parts of the RH8100 V3
Issue 30 (2019-12-19) Copyright © Huawei Technologies Co., Ltd. 128