Intel Embedded Intel486 User Manual

EMBEDDED Intel486™ PROCESSOR HARDWARE REFERENCE MANUAL
6-8
cache may provide acceptable performance at a lower cost when compared to a fully associative
cache memory.
Set Associative: The set-associative cache is a compromise between the fully associative and di-
rect-mapped cache. The set-associative cache has more than one set and it is equivalent to several
direct mapped cache operating in parallel. For each cache index there are several block locations
allowed, and the block can be placed in any set or retrieved from any set. Figure 6-3 shows a two-
way set associative cache memory.
Figure 6-3. Two-Way Set Associative Cache Organization
32-Bit Processor Address
TAG Index
32
24
23 15 14 0
16 Mbyte DRAM 24 Bits
2 x 32 K SRAM = 2 x 15 Bits
TAG
Cache-64 Kbyte
Index
001
1FF
000
001
000
0008
0004
0000
A
B
C
D
E
Y
B
Index
7FFC
7FF8
0008
0004
0000
A
D
C
E
7FFC
7FF8
0008
0004
0000
7FF8
7FFC
0008
0004
0000
32 Bits
DataTAG
7FFC
7FF8
Data
1FF
001
000
Index
1FF
001
0008
0004
0000
Y
W
32 Bits
DataTAG
7FFC
7FF8
W
9 Bits

Intel Embedded Intel486 Specifications

General

Brand	Intel
Model	Embedded Intel486
Category	Computer Hardware
Language	English