Intel Embedded Intel486

10-5
PHYSICAL DESIGN AND SYSTEM DEBUGGING
Figure 10-2. Typical Power and Ground Trace Layout for Double-Layer Boards
Decoupling
†
Capacitors
IC Packages
GND
V
CC
V
CC
V
CC
GND
GND
~
~
GND V
CC
†
Typical values should range between .01 µF and .1 µF