19.32.4 MTB_DWT Comparator Function Register 0
(MTBDWT_FCT0)
The MTBDWT_FCTn registers control the operation of comparator n.
Address: F000_1000h base + 28h offset = F000_1028h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0
MATCHED
0 0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
DATAVADDR0 DATAVSIZE
0
DATAVMATCH
0
FUNCTION
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
MTBDWT_FCT0 field descriptions
Field Description
31–25
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
24
MATCHED
Comparator match
If this read-only flag is asserted, it indicates the operation defined by the FUNCTION field occurred since
the last read of the register. Reading the register clears this bit.
Table continues on the next page...
Memory Map and Register Definition
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
320 Freescale Semiconductor, Inc.
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