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Omron CQM1H - PROGRAM User Manual

Omron CQM1H - PROGRAM
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38
Interrupt Functions Section 1-4
The following instructions are used to control high-speed counter operation.
The following flags and control bits are used to monitor and control high-
speed counter operation.
Wiring Depending on the input mode, the input signals from the pulse encoder to the
CPU Unit’s input terminal are as shown below.
High-speed counter 0
Encoder
inputs
When using interrupts.
Each cycle
Counter PV
SR 231 and SR 230
Input mode
Differential phase
Incrementing
Reset method
Phase-Z + software
Software
Count
MODE CONTROL
Register table.
Start comparison.
HIGH-SPEED COUNTER
PV READ
Change counter PV.
Start/stop comparison.
Read counter PV.
Read status of comparison.
AR 1100 to
AR 1107
DM 6642 bits
08 to 15
Each execution
Execute specified
subroutine.
PC Setup PC Setup
Ladder Program
REGISTER COMP TABLE
PC Setup
Generate
interrupt.
Interrupt Subroutine
Range
comparison
results
DM 6642 bits
04 to 07
DM 6642 bits
00 to 03
Instruction Control function
CTBL(63) Register a target value comparison table and start comparison.
Register a range comparison table and start comparison.
Register a target value comparison table.
(Start comparison with INI(61).)
Register a range comparison table.
(Start comparison with INI(61).)
INI(61) Start comparison with registered comparison table.
Stop comparison.
Change high-speed counter PV.
PRV(62) Read high-speed counter PV.
Word Bits Name Function
SR 230 00 to 15 High-speed Counter 0 PV
(rightmost 4 digits)
Contains the present value of high-
speed counter 0 (the CPU Unit’s
built-in high-speed counter.)
SR 231 00 to 15 High-speed Counter 0 PV
(leftmost 4 digits)
SR 252 00 High-speed Counter 0
Reset Bit
Resets the PV of high-speed
counter 0.
AR 11 00 to 07 High-speed Counter 0
Range Comparison Flags
Indicate the range comparison
results for high-speed counter 0.
0: Range condition not satisfied.
1: Range condition satisfied.
Terminal Allocated bit
address
Differential phase mode Incrementing mode
B2 (IN4) 00004 Encoder phase-A Pulse count input
A2 (IN5) 00005 Encoder phase-B ---
B3 (IN6) 00006 Encoder phase-Z Reset input

Table of Contents

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Omron CQM1H - PROGRAM Specifications

General IconGeneral
I/O CapacityUp to 512 points
Power Supply100 to 240 VAC, 50/60 Hz or 24 VDC (depending on model)
Instruction SetBasic and advanced instructions
Operating Temperature0 to 55°C
Program Capacity7.2K to 15.2K steps
Communication PortsRS-232C
Expansion SlotsUp to 3 expansion units
TypeProgrammable Logic Controller (PLC)
CPU TypeRISC
Program Memory7.2K to 15.2K steps
I/O Points512 max
Expansion CapabilityUp to 3 expansion units
Data MemoryRAM (battery backup)

Summary

PRECAUTIONS

1 Intended Audience

Specifies the target personnel for this manual, requiring knowledge of electrical systems and FA systems.

2 General Precautions

Outlines user responsibilities for operating the product according to specifications and consulting representatives for specific applications.

3 Safety Precautions

Details critical safety warnings related to I/O refreshing, touching internal components, disassembly, and power supply handling.

5 Application Precautions

Provides essential safety guidelines for using the PC System, including grounding, power handling, and unit mounting.

SECTION 1 PC Setup and Other Features

1-1 PC Setup

Explains operating parameters for CQM1H control, including default values and how to change them.

SECTION 2 Inner Boards

2-1 High-speed Counter Board

Describes the functions, input modes, comparison operations, and external outputs of the High-speed Counter Board.

2-2 Pulse I/O Board

Details the Pulse I/O Board's support for two pulse inputs and two pulse outputs, including input modes and interrupts.

SECTION 3 Memory Areas

3-1 Memory Area Structure

Explains the memory areas used by the CQM1H PC, including IR, Work, Controller Link status, MACRO operand, Inner Board, Analog, High-speed Counter, and EM areas.

SECTION 4 Ladder-diagram Programming

4-1 Basic Procedure

Outlines the fundamental steps for writing a program, including obtaining I/O lists and drawing ladder diagrams.

4-4 Controlling Bit Status

Details instructions for controlling individual bit status: OUTPUT, OUTPUT NOT, SET, RESET, DIFFERENTIATE UP/DOWN, KEEP.

4-6 Programming Precautions

Provides essential precautions for drawing clear ladder diagrams and inputting programs, emphasizing instruction order and TR bits.

4-7 Program Execution

Describes the CPU Unit's program scan from top to bottom, checking conditions, and executing instructions.

SECTION 5 Instruction Set

SECTION 6 Host Link Commands

6-1 Host Link Command Summary

Provides a summary table of Host Link commands available for CQM1H communications.

6-4 Command and Response Formats

Details the formats for commands issued from the host computer and responses received from the PC.

6-5 Host Link Commands

Lists and describes various Host Link commands for reading and writing data in IR, SR, LR, HR, DM, EM, and AR areas.

SECTION 7 CPU Unit Operation and Processing Time

7-1 CPU Unit Operation

Explains the overall operation flowchart of the CQM1H CPU Unit and defines cycle time.

7-2 Power Interruptions

Details the CPU Unit's behavior during power interruptions and momentary power supply failures.

7-3 Cycle Time

Explains the processes involved in a single execution cycle and their respective processing times.

SECTION 8 Troubleshooting

8-2 Programming Console Operation Errors

Lists common error messages encountered when using the Programming Console and their appropriate responses.

Appendix A Programming Instructions

5-8 Ladder Diagram Instructions

Explains basic instructions like LOAD, AND, OR, and their combinations, including logic block instructions.

5-9 Bit Control Instructions

Covers instructions for controlling individual bit status: OUT, OUT NOT, SET, RESET, DIFU, DIFD, KEEP.

5-14 User Error Instructions: FAILURE ALARM AND RESET – FAL(06) and SEVERE FAILURE ALARM – FALS(07)

Describes instructions for outputting error numbers for operation, maintenance, and debugging, including non-fatal and fatal errors.

5-16 Timer and Counter Instructions

Details instructions for managing timers and counters, including TIM, TIMH, CNT, CNTR, TTIM, STIM, and CTBL.

5-29 Network Instructions

Explains instructions for communicating with other PCs via the Controller Link System, including SEND, RECV, and CMND.

5-30 Communications Instructions

Details instructions for serial communications, including RECEIVE (RXD), TRANSMIT (TXD), CHANGE SERIAL PORT SETUP (STUP), and PROTOCOL MACRO (PMCR).

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