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RL78/F13, F14 CHAPTER 15 SERIAL ARRAY UNIT

R01UH0368EJ0210 Rev.2.10 976

Dec 10, 2015

Figure 15-134. Flowchart of UART Reception

Caution For the UART reception, set the RXEmn bit of SCRmn register to 1, and then be sure to set SSmn

to 1 after 4 or more f

MCK clocks have elapsed.

Remark m: Unit number (m = 0, 1), n: Channel number (n = 1), mn = 01, 11, r: Channel number (r = n − 1)

Starting UART communication

Writing 1 to the SSmn bit

Writing 1 to the STmn bit

Specify the initial settings

while the SEmn bit of serial

channel enable status register

m (SEm) is 0 (operation is

stopped).

SMRmn, SMRmr, SCRmn: Setting communication

SDRmn[15:9]: Setting transfer rate

Transfer end interrupt

enerated?

Reception completed?

Yes

Starting reception

Reading the SDRmn

Detecting start bit

Error occurred?

Yes

Error processing

Port manipulation

Clearing the SAUmEN bit of the

PER0 register to 0

Setting the SAUmEN bit of the

PER0 register to 1

Setting transfer rate by the

SPSm register

End of UART communication

Renesas RL78/F14 User Manual

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