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Samsung HS40 - Page 187

Samsung HS40
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Chapter 5. Product Structure 5 19
5.4.3.3. Host Interface & RTC Part
Host Interface
The Host Interface integrated into MID FPGA (KINTEX325T) is connected to the PC on PCI-
Express 1 Lane through the PCI-Express Switch. The Host Interface converts Host
Commands from the PC with the Local Bus and provides interfaces for each of the
Ultrasound System’s boards.
RTC Part
The RTC (Real Time Controller), which is integrated into the MID FPGA, controls the
operation of the system by generating the standard signals that are needed for the operation
of the entire system in real time. It generates PRF (Pulse Repeat Frequency), OF (One
Frame), RP (Rate Pulse), Linotype, and Scan Line, which are required for the BF Board and
the DSP Part of the BE Board.
5.4.3.4. D MA P art
The Direct Memory Access (DMA) Part, which is integrated into the Back End Board’s MID
FPGA (KINTEX325T), consists of the PCI-Express Gen1 1 Lane to transfer large amounts of
Base-Band IQ Data at high speed, and functions as a PCI-Express Interface within the FPGA.
It has a DDR3 SODIMM (4Gbyte) external memory in order to save large capacity Base-Band
IQ Data by frame.

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