Schweitzer Engineering Laboratories SEL-351 - Page 208

Schweitzer Engineering Laboratories SEL-351

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5-22 Trip and Target Logic Date Code 20001006

SEL-351 Instruction Manual

unblock block input into the trip logic in Figure 5.1. When UBB asserts to logical 1, tripping is

blocked.

Figure 5.10: DCUB Logic

Courtesy of NationalSwitchgear.com

Table of Contents

Table of Contents15
- Section 1: Introduction and Specifications17
Section 2: Installation37
- Table of Contents37
- Section 2: Installation41
Section 3: Overcurrent, Voltage, Synchronism Check, Frequency, and Power Elements/Section 3: Overcurrent, Voltage, Synchronism Check, Frequency, and Power Elements75
Section 4: Loss-Of-Potential, Load Encroachment, and Directional Element Logic/Section 4: Loss-Of-Potential, Load Encroachment, and Directional Element Logic143
Section 5: Trip and Target Logic183
Section 6: Close and Reclose Logic221
Section 7: Inputs, Outputs, Timers, and Other Control Logic/Section 7: Inputs, Outputs, Timers, and Other Control Logic255
Section 8: Breaker Monitor, Metering, and Load Profile Functions/Section 8: Breaker Monitor, Metering, and Load Profile Functions305
Section 9: Setting the Relay341
Section 10: Serial Port Communications and Commands/Section 10: Serial Port Communications and Commands405
Section 11: Front-Panel Interface449
Section 12: Standard Event Reports, Sag/Swell/ Interruption Report, and Ser/Section 12: Standard Event Reports, Sag/Swell/ Interruption Report, and Ser465
- Interruption Report, and Ser467
Section 13: Testing and Troubleshooting505
Table of Contents517

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