Date Code 20001006 Trip and Target Logic 5-31
SEL-351 Instruction Manual
Additionally, if SCADA asserts optoisolated input IN4 to trip and it should illuminate the COMM
target LED, set it in SELOGIC Control Equation setting DTT also:
DTT = … + IN4 + …
Relay Word bits set in SELOGIC Control Equation setting DTT do not have to be set in SELOGIC
Control Equation setting TR - both settings directly assert the TRIP Relay Word bit. The only
difference between settings DTT and TR is that setting DTT causes the COMM target LED to
illuminate.
Many other variations of the above DTT settings examples are possible.
SOTF Target LED
The SOTF target LED illuminates at the rising edge of the TRIP Relay Word bit if the trip is the
result of the SELOGIC Control Equation setting TRSOTF and associated switch-onto-fault trip
logic (see Figure 5.3).
50 Target LED
The 50 target LED illuminates at the rising edge of trip if an instantaneous or definite-time
overcurrent element causes the trip.
51 Target LED
The 51 target LED illuminates at the rising edge of trip if a time-overcurrent element (51PT,
51AT, 51BT, 51CT, 51NT, 51GT, or 51QT) causes the trip.
81 Target LED
The 81 target LED illuminates at the rising edge of trip if a frequency element (81D1T through
81D6T) causes the trip.
FAULT TYPE Target LEDs
A, B, and C Target LEDs
“A” (Phase A) target LED is illuminated at the rising edge of trip if an overcurrent element causes
the trip and Phase A is involved in the fault [likewise for “B” (Phase B) and “C” (Phase C) target
LEDs]. SELOGIC Control Equation FAULT has to be picked up for three-phase fault indication.
G Target LED
G target LED is illuminated at the rising edge of trip if a residual ground overcurrent element
causes the trip or was picked up and timing to trip.
Courtesy of NationalSwitchgear.com
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