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Siemens SIDOOR ATD4 W Series - Discrepancy Analysis Blocks; Basic Blocks; Frequency Analysis Blocks

Siemens SIDOOR ATD4 W Series
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4.3.9.6 Discrepancy analysis blocks
The discrepancy analysis block "AND0" has four time-monitored inputs, two of which are
negated or inverted. The output signal at Q17 behaves according to the following rules:
The output signal only becomes active if all inputs were activated synchronously within the
time de󹪝ned via parameter p4610.
The output signal becomes inactive as soon as at least one input signal has become inactive.
The output signal can only be reactivated after all input signals have been inactive.
As of V1.10: The second discrepancy analysis block "AND2" behaves like "AND0". The output
signal is available at Q64. The discrepancy time is set with parameter p4611.
As of V1.12: A violation of the discrepancy time is indicated for "AND0" and for "AND2" in the
following ways:
TZW2 – bits 6 (AND0) and 7 (AND2) - see section TZW2 - technology status word 2
(Page 325)
As "a" on the operating status display - see section Status display (Page 303)
4.3.9.7 Basic blocks
The basic function blocks "AND", "OR", "NOT" and "XOR" are provided to be able to map basic
logical combinations.
4.3.9.8 Frequency analysis blocks
An input signal can be analyzed for speci󹪝c frequencies and duty factors via the "FRQ" frequency
blocks. Two identical frequency analysis blocks are available, capable of detecting frequencies
of 1 Hz and 0.5 Hz with a duty factor of 20 %.
The detection criteria and the valid tolerances are described in detail in the following 󹪝gure.
SIDOOR functions
4.3 Extended functions
ATD4xxW for industrial applications
System Manual, 06/2022, A5E51901827B AA 99

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