Parameters for comparison
You can configure the following for the counter:
● "Set output DQ" parameter:
Evaluation of the comparison value:
For settings, see the following table "Configure evaluation of the comparison value"
● "DQ channel" parameter
Output the status at a DQ channel (parameter requires a free channel for the output).
● "Hardware interrupt" parameter
Generates a hardware interrupt when the STS_DQ status bit changes from 0 to 1 (see
following table).
Configure evaluation of the comparison value
With the "Set output DQ" parameter, you determine when the STS_DQ status bit is set.
The parameter only affects the status bit STS_DQ.
Table 5-3 "Set output DQ" parameter
Value Setting Behavior; condition
1 "Between comparison
value and high limit"
● Status bit STS_DQ = 0; if counter reading < comparison value
● Status bit STS_DQ = 1; if counter reading >= comparison value
See the following figure "STS_DQ bit between comparison value and high counting
limit"
2 "Between comparison
value and low limit"
● Status bit STS_DQ = 1; if counter reading < comparison value
● Status bit STS_DQ = 0; if counter reading >= comparison value
See the following figure "STS_DQ bit between comparison value and low counting
limit"
Setting the STS_DQ status bit between the comparison value and high counting limit
If the setting "Between comparison value and high limit" is selected for the parameter "Set
output DQ", the status bit STS_DQ is set in the following case:
● Counter reading >= Comparison value
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Figure 5-3 STS_DQ bit between comparison value and high counting limit
Operating modes and functions
5.3 Counting
SIMATIC CFU
42 Commissioning Manual, 08/2019, A5E39252870-AD