CPU SPeCifiCationS and
oPerationS
Chapter
Chapter
Chapter
3
3
In This Chapter
CPU Overview ............................................................................3–2
CPU General Specifications ........................................................3–4
CPU Base Electrical Specifications ...............................................3–5
CPU Hardware Setup .................................................................3–6
Selecting the Program Storage Media ........................................3–9
Using Battery Backup .................................................................3–14
CPU Operation ........................................................................... 3–21
I/O Response Time .....................................................................3–27
CPU Scan Time Considerations ..................................................3–29
PLC Numbering Systems ............................................................3–35
Memory Map .............................................................................3–37
DL230 System V-memory ..........................................................3–41
DL240 System V-memory ..........................................................3–43
DL250–1 System V-memory (DL250 also) .................................3–46
DL260 System V-memory ..........................................................3–49
DL205 Aliases ............................................................................. 3–52
DL230 Memory Map .................................................................3–53
DL240 Memory Map .................................................................3–54
DL250–1 Memory Map (DL250 also) .........................................3–55
DL260 Memory Map .................................................................3–56
X Input/Y Output Bit Map ..........................................................3–57
Control Relay Bit Map ................................................................3–59
Stage Control/Status Bit Map .....................................................3–63
Timer and Counter Status Bit Maps ...........................................3–65
Remote I/O Bit Map ...................................................................3–66
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