Efinix Titanium - Page 83

Titanium Interfaces User Guide
lvds_rule_rx_pll_refclk (error)
Message Serial clock name is not a PLL output clock
To fix Use a PLL output clock as the serial (FASTCLK) clock.
Message Parallel clock name is not a PLL output clock
To fix Use a PLL output as the parallel (SLOWCLK) clock.
lvds_rule_rx_pll_refclk (warning)
Message Serial clock is expected to be from the following PLL instance: <resource>
To fix Only a specific PLL instance can drive the LVDS RX clocks. Change the PLL to use that
resource. See PLL Requirements for Serial and Parallel Clocks on page 75.
Message PLL driving the serial clock should have its reference clock from an LVDS in pll_clkin
connection type
To fix The PLL's reference clock needs to be driven by a specific resource. Create an LVDS RX block
and set the Connection Type to pll_clkin. Then use that block as the PLL reference clock.
Message Parallel clock is expected to be from the following PLL instance: {}
To fix Only a specific PLL instance can drive the LVDS RX clocks. Change the PLL to use that
resource. See PLL Requirements for Serial and Parallel Clocks on page 75.
Message PLL driving the parallel clock should have its reference clock from an LVDS in pll_clkin
connection type
To fix The PLL's reference clock needs to be driven by a specific resource. Create an LVDS RX block
and set the Connection Type to pll_clkin. Then use that block as the PLL reference clock.
lvds_rule_rx_serial_width (error)
Message Unsupported deserializaion width: 9
To fix The LVDS block does not support a deserialization wiudth of 9. Choose another width.
lvds_rule_tx_width_1or2 (error)
Message Parallel clock name is required with serialization width 2
Serialization width <1/2> only requires the parallel clock name to be specified
To fix When you are using the LVDS serializer (serialization width greater than 1), you need to
specify the parallel clock pin name.
lvds_rule_rx_width_1or2 (error)
Message Parallel clock name is required with deserialization width 2
Deserialization width <1/2> only requires the parallel clock name to be specified
To fix When you are using the LVDS deserializer (serialization width greater than 1), you need to
specify the parallel clock pin name.
lvds_rule_serial_rate (error)
Message Half rate serialization only allowed with even serialization width
To fix When you turn on Enable Half Rate Serialization, you can only use an even number for the
serialization width. Change the width to an even number or turn the option off.
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