Titanium Interfaces User Guide
lvds_rule_rx_distance (error)
Message These HSIO GPIO must be placed at least 1 pair away from LVDS <name> in order to avoid
noise coupling from GPIO to LVDS: <violated list>
To fix When using HSIO pins as GPIO, make sure to leave at least 1 pair of unassigned HSIO pins
between any GPIO and HSIO used as LVDS RX in the same bank. This separation reduces
noise.
lvds_rule_rx_dpa (error)
Message Half-rate deserialization is not supported with DPA delay mode
To fix You can only use full-rate serialization with DPA mode. Turn off the Enable Half Rate
Deserialization option.
lvds_rule_rx_dpa_es_device (error)
Message DPA delay mode is not supported in ES device
To fix The ES FPGA does not support DPA.
lvds_rule_rx_dpa_serial (error)
Message DPA delay mode is not supported with deserialization disabled
To fix You cannot use dynamic phase alignment in bypass mode.
Message DPA delay mode is not supported with deserialization width less than 3
To fix You cannot use dynamic phase alignment with x1 or x2 modes.
lvds_rule_rx_empty_pins (error)
Message Empty pin names found: <list>
To fix You need to specify the pin names listed in the message.
lvds_rule_rx_fifo (error)
Message Clock Crossing FIFO is not supported with deserialization width <1/2>
To fix The Clock Crossing FIFO is only available for deserialization widths > 2. Disable the Clock
Crossing FIFO or change the serialization value.
Message Clock Crossing FIFO is only supported with deserialization enabled
To fix The Clock Crossing FIFO is only available for deserialization widths > 2. Disable the Clock
Crossing FIFO or change the serialization value.
lvds_rule_rx_param (error)
Message Invalid parameters configuration: <list>
To fix One of the parameters you set was incorrect. Review any other errors for details.
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