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Freescale Semiconductor MPC5604B - 7. FlexCAN Module Configuration

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Finding the number of quanta in the bit-time.
Finding the number of quanta in the propagation segment depending on the delay.
Check the parity of (bit_time prop_seg 1), and fix the number of quanta in
Phase_Seg_1 and Phase_Seg_2 (ensuring Phase_Seg_2 > IPT).
RJW set to the minimum of Phase_Seg_1 and 4.
Then the oscillator tolerance  between CAN clock of different devices

=
(
1 + 
)
,
=
(
1 
)
has to satisfy the following condition:
min 󰇧

20.bit_time
;
min
(
Phase_seg_1; Phase_seg_2
)
2
(
13.bit_time Phase_seg_2
)
󰇨
A simpler but less sure method is to pick a bit-time with 12
to 20
(usually 16
) and assume
that sampling point is at the 75% of this period making 75% to 100% segment equal to
Phase_Seg_2. Then by taking Phase_Seg_1=Phase_Seg_2 and RJW=4, propagation segment is
easily set. If these timings result in recurring problems with sampling, the assumption on the
sampling point can be moved up to 80% of the bit-time and can be tried again.
7.
FlexCAN Module Configuration
7.1.
Module Description
Figure 117: FlexCAN block diagram (R.M. Rev8 Fig. 22-1)

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