Freescale Semiconductor MPC5604B - Chapter 2 SIUL: System Integration Unit Line; 1. Introduction; 2. Pad configuration

We can see that there are five possible clock sources in this architecture:
 FXOSC: Fast External Crystal Oscillator, between 4-16MHz (8 MHz on TRK-
MPC5604B),
 FIRC: Fast Internal RC Oscillator, 16MHz,
 SXOSC: Slow External Crystal Oscillator, 32kHz,
 SIRC: Slow Internal RC Oscillator, 128kHz,
 FMPLL: Frequency Modulated Phase Locked Loop allows delivering a high speed clock
up to 64MHz using FXOSC.
Slow clocks are mostly used for the real time clock module and we will focus more on the fast
ones that are used for system clock generation.
System clock can be selected among FXOSC, FIRC or their division by 1 to 32, or by FMPLL. This
clock drives the core of the microcontroller, it can be gated to different peripheral sets, and can
be divided for power saving. We can also generate an output clock from pin PA [0] called CLOCK
OUT using these fast oscillators.
2.2.
Clock Out
In this section we will review the registers used to generate an output clock. It can be controlled
using two registers.
Figure 11 : Output Clock Enable Register (Reference Manual Rev8 – Fig. 7-2)
Figure 12 : Output Clock Division Select Register (Reference Manual Rev8 – Fig. 7-2)
Use of the enable register is obvious; write 1 to enable the output clock. For the other one,
SELDIV is the amount of division (clock divided by 2

) and SELCTL is the selection of the
source clock among FXOSC (0000), FIRC (0001) and FMPLL (0010).
Here’s an example of using the Output Clock with FMPLL after dividing it by 8:
CGM.OCDS_SC.R = 0x32000000; /* Select FMPLL and divide by 2

*/
CGM.OC_EN.B.EN = 1; /* Write 1 to enable bit */
/* Here insert GPIO code that selects CLOCKOUT functionality for the pin
PA[0]: SIU.PCR[0].R = 0x0800;, see chapter on SIUL and pad configurations.*/