The DSPI Modules provide an implementation of the SPI protocol with some enhancements like
FIFO buffers in the memory for simpler communication, various interrupts and a precise control
on the baud rate and delays.
Figure 87 : The DSPI module block diagram (R.M. Rev8 – Fig. 23-1)
Each DSPI module has six chip select (CSx) signals that can handle communication with a
considerable amount of external devices.
Figure 88 : DSPI Signal Properties (R.M. Rev8 –Table 23-1)
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