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Freescale Semiconductor MPC5604B - Chapter 4 Timer Modules; 1. Introduction

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There’s also a glitch filter for these pads that avoids erroneous requests that may be triggered by
noise. Interrupt Filter Enable Register (IFER) can set which pads are to be filtered. And IFMC
and IFCPR are used to set filters parameters. These two registers together have only two fields
MAXCNT[x][3:0] (x: one for each pad) is the Maximum Couter, IFCP[3:0] is the clock prescaler
setting common to all pads. Having these two parameters, we have:
Filter Period
[
]
=

×
(

[
]
+
)
( is random in [1,3])

=
(
+ 1
)
×

,

= 16
If the signal is steady for at least the Filter Period, then the glitch filter triggers the interrupt.

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