Intel SC5650BCDP Technical Product Specification

Functional Architecture Intel
®
Server Board S5500BC TPS
Intel order number: E42249-009 Revision 1.8
20
3.1.4 Turbo Mode
The Turbo Mode feature opportunistically and automatically allows the CPU to run faster than
the TDP frequency if the processor is operating below specifications. The processor must be
below the power, temperature, and current specification limits. Turbo Mode increases
performance of both multi-threaded and single-threaded workloads. Turbo Mode operates under
operating system control - only entered when the operating system requests higher
performance, such as a transition from a P1 state to a P0 state. The ability to enter Turbo Mode
is independent of the number of active cores. Achievable processor turbo frequency is limited by
the most constraining of processor temperature, power, core Icc, and core ratio limits.
Maximum Turbo Mode frequency is dependent on the number of active cores. Each processor
has ‖ that may have freq
bin‖. When fewer cores are active, more turbo bins are available.
Example: 1 Core 3 Turbo bins, 2 Cores 2 Turbo bins, and 4 Cores 1 Turbo bin. If the processor
supports this feature (it is not available in all SKUs), the BIOS setup provides an option to
enable or disable this feature. The default is disabled.
3.1.5 Intel
®
Hyper-Threading Technology (Intel
®
HT)
The BIOS creates additional entries in the ACPI MP tables to describe the virtual processors.
The SMBIOS Type 4 structure shows only the installed physical processors; it does not describe
the virtual processors.
Because some operating systems cannot efficiently use the Intel
®
HT Technology, the BIOS
does not create entries in the Multi-Processor Specification, Version 1.4 tables to describe the
virtual processors.
3.1.6 Enhanced Intel
®
SpeedStep
®
Technology (EIST)
Enhanced Intel
®
SpeedStep
®
Technology helps reduce average system power consumption and
potentially improves system acoustics by allowing the system to dynamically adjust the
processor voltage and core frequency
3.1.7 Core Multi-Processing
The BIOS setup provides the ability to selectively enable one or more cores. The default
behavior is to enable all cores. You can do this through the BIOS setup option for active core
count.
The BIOS creates entries in the Multi-Processor Specification, Version 1.4 tables to describe
multi-core processors. The BIOS does the following:
 Initializes all processor cores.
 Installs all NMI handlers for all Intel
®
Xeon
®
processor 5500 series and 5600 series.
 Leaves initialized AP in CLI/HLT loop.
 Initializes stack for all APs.
The BIOS Setup provides an option to selectively enable or disable multi-core processor
support. The default behavior is enabled.

Intel SC5650BCDP Specifications

General

Brand	Intel
Model	SC5650BCDP
Category	Server
Language	English