Intel SC5650BCDP Technical Product Specification

Intel
®
Server Board S5500BC TPS Functional Architecture
Revision 1.8 Intel order number: E42249-009 41
ARM926EJ-S
16K D & I
Cache
Interrupt
Controller
Fan Tach (12)
PWM (4)
ADC
Thermal
USB 1.1
&
USB 2.0
LPC Master,
JTAG Master,
& SPI FLash
UART (3) GPIO
KCS
BT &
Mailboxes
System
Wakeup
Control
LPC
Interface
Graphics
Controller
BMC & KVMS Subsystem
BMC & KVMS Subsystem Graphics Subsystem
RTC &
General Purpose
TImers (3)
UART
(3)
I2C
(6)
Ethernet
MAC with
RMII (2)
Crypto
Accelerator
DDR-II
16-bit
Memory
Controller
LPC to SPI
Flash Bridge
Watchdog
Timer
Real Time Clock
Interface
(external RTC)
LPC
Interface
To Host
Video
Output
PCIe x1
Interface
DDR-II
(up to
667MHz)
JTAG
Master
Code
Memory
USB
to Host
Integrated BMC Block Diagram
Figure 17. Integrated BMC Block Diagram
3.6.1 Integrated BMC Embedded LAN Channel
The Integrated BMC hardware includes two dedicated 10/100 network interfaces.
 Interface 1: This interface is available from either of available NIC ports in system which
can be shared with the host. Only one NIC may be enabled for management traffic at
any time. The active interface is NIC2 on this board.
 Interface 2: This interface is available from RMM3 which is dedicated management NIC
and not shared with host.
For these channels, you can enable support for IPMI-over-LAN and DHCP. For security reasons,
embedded LAN channels have the following default settings:
 IP Address: Static

Intel SC5650BCDP Specifications

General

Brand	Intel
Model	SC5650BCDP
Category	Server
Language	English