Functional Architecture Intel
®
Server Board S5500BC TPS
Intel order number: E42249-009 Revision 1.8
BMC initializes ME-owned sensors based on SDRs.
BMC receives platform event messages sent by the ME.
BMC notifies ME of POST completion.
BMC may be queried by the ME for inlet temperature readings.
3.3.5 Intel
®
Virtualization Technology for Directed I/O (Intel
®
VT-d) (rev. 2)
Intel
®
Virtualization Technology (Intel
®
VT) is the technology that makes a single system appear
as multiple independent systems to software loaded on the system. This allows for multiple
independent operating systems to be running simultaneously on a single system. The first
revision of this technology (Intel
®
Virtualization Technology for Intel
®
IA-32 Architecture or Intel
®
VT-x) adds hardware support in the processor to improve the virtualization performance and
robustness. The second revision of this specification (Intel
®
VT-d) adds a chipset hardware
implementation to improve I/O performance and robustness.
You can enable the Intel
®
VT in the BIOS Setup. The default setting is disabled.
Note: If the setup options are changed to enable or disable the Virtualization Technology setting
in the processor, the user must perform an AC power cycle before the changes take effect.
The Intel
®
IOH 5500 chipset on the Intel
®
Server Board S5500BC supports Intel
®
VT-d2 features
as outlined:
Builds on the first generation of Intel
®
VT-d features
Improves performance through better invalidation architecture
Supports end-point Address Translation Caching (ATC) compliant with the PCISIG IOV
Address Translation Services (ATS), Revision 1.0 specification
Provides interrupt remapping
Optimizes translation of sequential accesses
Supports IOV (ARI)
Note: For more information on VT-d2, refer to:
http://software.intel.com/en-us/articles/intel-virtualization-technology-for-directed-io-vt-d-
enhancing-intel-platforms-for-efficient-virtualization-of-io-devices/