Intel SC5650BCDP Technical Product Specification

Power and Environmental Specifications Intel
®
Server Board S5500BC TPS
Intel order number: E42249-009 Revision 1.8
112
Item
Description
Minimum
Maximum
Units
T
pwok_on
Delay from output voltages within regulation limits to PWOK
asserted at turn on.
100
500
ms
T
pwok_off
Delay from PWOK de-asserted to output voltages (3.3V, 5V,
12V, -12V) dropping out of regulation limits.
1
ms
T
pwok_low
Duration of PWOK in the de-asserted state during an off/on
cycle using AC or the PSOn signal.
100
ms
T
sb_vout
Delay from 5VSB in regulation to O/Ps in regulation at AC
turn on.
50
1000
ms
T
5VSB_holdup
Time the 5VSB output voltage stays within regulation after
loss of AC.
70
ms
Figure 47. Turn On/Off Timing (Power Supply Signals)
9.2.15 Residual Voltage Immunity in Standby Mode
The power supply should be immune to any residual voltage placed on the outputs (typically a
leakage voltage through the system from standby output) up to 500 mV. There should be no
additional heat generated, or stress of any internal components with this voltage applied to any
individual output or all outputs simultaneously. It should not trip the power supply protection
circuits during turn on.
Residual voltage at the power supply outputs for a no load condition should not exceed 100 mV
when AC voltage is applied and the PSOn# signal is de-asserted.

Intel SC5650BCDP Specifications

General

Brand	Intel
Model	SC5650BCDP
Category	Server
Language	English