EasyManua.ls Logo

Intel SC5650BCDP

Intel SC5650BCDP
162 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
Functional Architecture Intel
®
Server Board S5500BC TPS
Intel order number: E42249-009 Revision 1.8
22
Figure 14. ILM Backplate and URS
3.2 Memory Subsystem
3.2.1 Supported Memory
The Intel
®
Xeon
®
processors 5500 series and 5600 series have an Integrated Memory
Controller (IMC). The Intel
®
Server Board S5500BC memory interface supports two DDR3
channels. Each channel consists of 64 data and 8 ECC bits. The IMC provides DDR3 channels

Table of Contents

Other manuals for Intel SC5650BCDP

Related product manuals