Motorola MC68020 User Manual

MOTOROLA M68020 USER’S MANUAL 6- 5
OTHERWISE
SP (VECTOR #0)
EXIT
FETCH VECTOR #0
(DOUBLE BUS FAULT)
S (SR)
M (SR
)
T1, T0 (SR
)
I2–I0 (SR
)
VB
R
CAC
R
1
0
0
$
7
$
00000000
$
00000000
➧
➧
➧
➧
➧
➧
(DOUBLE BUS FAULT)
(DOUBLE BUS FAULT)
ENTRY
OTHERWISE
BEGIN INSTRUCTION
EXECUTION
OTHERWISE
INSTRUCTION CACHE
E
NTRIES INVALIDATE
D
➧
FETCH VECTOR #1
PC (VECTOR #1)
➧
PREFETCH 3 WORDS
EXIT
EXIT
EXIT
BUS ERROR
BUS ERROR
BUS ERROR OR
ADDRESS ERROR
Figure 6-1. Reset Operation Flowchart
The processor begins exception processing for a bus error by making an internal copy of
the current SR. The processor then enters the supervisor privilege level (by setting the S-
bit in the SR) and clears the T1 and T0 bits in the SR. The processor generates exception
vector number 2 for the bus error vector. It saves the vector offset, PC, and the internal
copy of the SR on the active supervisor stack. The saved PC value is the logical address
of the instruction that was executing at the time the fault was detected. This is not
necessarily the instruction that initiated the bus cycle since the processor overlaps

Motorola MC68020 Specifications

General

Brand	Motorola
Model	MC68020
Category	Computer Hardware
Language	English