Motorola MC68020 User Manual

MOTOROLA M68020 USER’S MANUAL 8- 35
8.2.13 Bit Manipulation Instructions
The bit manipulation instructions table indicates the number of clock periods needed for
the processor to perform the specified bit operation on the given addressing mode.
Footnotes indicate when it is necessary to add another table entry to calculate the total
effective execution time for the instruction. The total number of clock cycles is outside the
parentheses; the number of read, prefetch, and write cycles is given inside the
parentheses as (r/p/w). These cycles are included in the total clock cycle number.
Instruction Best Case Cache Case Worst Case
BTST #<data>,Dn 1(0/0/0) 4(0/0/0) 5(0/1/0)
BTST Dn,Dn 1(0/0/0) 4(0/0/0) 5(0/1/0)
** BTST #<data>,Mem 4(0/0/0) 4(0/0/0) 5(0/1/0)
* BTST Dn,Mem 4(0/0/0) 4(0/0/0) 5(0/1/0)
BCHG #<data>,Dn 1(0/0/0) 4(0/0/0) 5(0/1/0)
BCHG Dn,Dn 1(0/0/0) 4(0/0/0) 5(0/1/0)
** BCHG #<data>,Mem 4(0/0/1) 4(0/0/1) 5(0/1/1)
* BCHG Dn,Mem 4(0/0/1) 4(0/0/1) 5(0/1/1)
BCLR #<data>,Dn 1(0/0/0) 4(0/0/0) 5(0/1/0)
BCLR Dn,Dn 1(0/0/0) 4(0/0/0) 5(0/1/0)
** BCLR #<data>,Mem 4(0/0/1) 4(0/0/1) 5(0/1/1)
* BCLR Dn,Mem 4(0/0/1) 4(0/0/1) 5(0/1/1)
BSET #<data>,Dn 1(0/0/0) 4(0/0/0) 5(0/1/0)
BSET Dn,Dn 1(0/0/0) 4(0/0/0) 5(0/1/0)
** BSET #<data>,Mem 4(0/0/1) 4(0/0/1) 5(0/1/1)
* BSET Dn,Mem 4(0/0/1) 4(0/0/1) 5(0/1/1)
*Add Fetch Effective Address Time
** Add Fetch Immediate Address Time

Motorola MC68020 Specifications

General

Brand	Motorola
Model	MC68020
Category	Computer Hardware
Language	English