Motorola MC68020 User Manual

MOTOROLA M68020 USER’S MANUAL 6- 21
ENTRY
SR TEMP
S
P SP +
6
➧
➧
TEMP (SP) +
R
EAD FORMAT WOR
D
➧
OTHERWISE
FORMAT CODE = $1
(THROWAWAY FRAME)
OTHERWISE
PC (SP) +
SP SP +
6
SR TEM
P
➧
➧
➧
EXIT
OTHER FORMATS
TAKE FORMAT
E
RROR EXCEPTIO
N
OTHERWISE
FORMAT CODE = $0 (FOUR-WORD FRAME)
INVALID FORMAT WORD
Figure 6-7. RTE Instruction for Throwaway Four-Word Frame
For the coprocessor midinstruction stack frame, the processor reads the SR, PC,
instruction address, internal register values, and the evaluated effective address from the
stack, restores these values to the corresponding internal registers, and increments the
stack pointer by 20. The processor then reads from the response register of the
coprocessor that initiated the exception to determine the next operation to be performed.
Refer to Section 7 Coprocessor Interface Description for details of coprocessor-related
exceptions.
For both the short and long bus fault stack frames, the processor first checks the format
value on the stack for validity. In addition, for the long stack frame, the processor
compares the version number in the stack with its own version number. The version
number is located in the most significant nibble (bits 15–12) of the word at location SP +
$36 in the long stack frame. This validity check is required in a multiprocessor system to
ensure that the data is properly interpreted by the RTE instruction. The RTE instruction
also reads from both ends of the stack frame to make sure it is accessible. If the frame is
invalid or inaccessible, the processor takes a format error or a bus error exception,
respectively. Otherwise, the processor reads the entire frame into the proper internal
registers, deallocates the stack, and resumes normal processing. Once the processor
begins to load the frame to restore its internal state, the assertion of the
BERR signal

Motorola MC68020 Specifications

General

Brand	Motorola
Model	MC68020
Category	Computer Hardware
Language	English