Motorola MC68020 - Page 302

INDEX-2 M68020 USER’S MANUAL MOTOROLA
Coprocessor Context Save and Context
Restore Instruction Categories, 7-16
Coprocessor Context Save Instruction
Category, 7-20
Coprocessor General Instruction Category,
7-8
Coprocessor Instructions, 7-1, 7-7
Format Words, 7-18
Instruction, 6-25, 7-3
Instruction Execution, 7-6
Coprocessor Detected
Data-Processing-Related Exceptions, 7-51
Exception, 7-49
Format Errors, 7-52
Illegal Coprocessor Command or Condition
Words, 7-51
Protocol Violation Exceptions, 7-50
System-Related Exceptions, 7-51
Coprocessor Instruction, 6-25, 7-3
Coprocessor Interface, 5-53, 7-1, 7-2
Coprocessor Interface Register (CIR), 7-4, 7-5,
7-6, 7-24
Command CIR, 7-25
Condition CIR, 7-26
Control CIR, 7-24
Instruction Address CIR, 7-27
Memory Map, 7-24
Operand Address CIR, 7-27
Operand CIR, 7-26
Operation Word CIR, 7-25
Register Select CIR, 7-27
Response CIR, 7-24
Restore CIR, 7-25
Save CIR, 7-25
Selection, 7-6
CPU Address Space, 2-4, 5-44, 7-6
CPU Space Type, 5-44, 5-53
Cycle
Asynchronous Cycles, 5-1, 5-5
Autovector Interrupt Acknowledge Cycle,
5-45, 5-48
Breakpoint Acknowledge Cycle, 5-50
Coprocessor Interface Bus Cycles, 7-4
Interrupt Acknowledge Cycle, 5-4, 5-45
Operand Transfer Cycle, 5-5
Synchronous Cycle, 5-24
— D —
Data Accesses, 4-2
Data Bus (D31–D0), 3-2, 5-3, 5-5, 5-21, 5-25
Data Registers, 1-4
Data Types, 1-8
DBEN Signal, 3-5, 5-4
DC Electrical Characteristics
MC68020, 10-4
MC68EC020, 10-5
Destination Function Code Register (DFC), 1-7
Differences between MC68020 and MC68EC020,
1-1, 5-62
Double Bus Fault, 5-60
DS Signal, 3-4, 5-4, 5-21
DSACK1, DSACK0 Signals, 3-5, 5-4, 5-5, 5-24,
5-46, 5-53, 9-5
Dynamic Bus Sizing, 5-5
— E —
ECS Signal, 3-4, 5-3
Effective Address, 8-13, 8-14, 8-16, 8-17, 8-19
Electrical Specifications, 10-1
Exception, 2-5, 7-57
Address Error Exception, 5-14, 6-6, 7-57
Breakpoint Instruction, 6-17
Bus Error Exception, 6-4, 6-21
Coprocessor-Detected Exception, 7-49
cpTRAPcc Instruction Traps, 7-55
Data-Processing-Related Exception, 7-51
F-Line Emulator Exception, 7-54
Format Error Exception, 6-10, 7-57
Illegal Instruction, 6-7
Interrupt Exception, 5-45, 6-11, 7-56
Multiple, 6-17
Privilege Violation Exception, 6-7, 6-8, 7-55
Protocol Violation, 7-50
Reset Exception, 6-4
Stack Frames, 6-25
System-Related Exception, 7-51
Trace Exception, 6-9, 7-55
Trap Exception, 6-6
Unimplemented Instruction, 6-7
Exception Handler, 6-2
Exception Processing, 2-1, 2-5, 6-1
Exception-Related Instructions, 8-39
Exception Stack Frame, 2-6, 6-25
Exception Vector Table, 2-5, 6-2