Motorola MC68020 - Page 5

9/29/95 SECTION 1: OVERVIEW UM Rev 1
MOTOROLA M68020 USER’S MANUAL ix
TABLE OF CONTENTS (Continued)
Paragraph Page
Number Title Number
5.5.2 Retry Operation ................................................................................... 5-56
5.5.3 Halt Operation...................................................................................... 5-60
5.5.4 Double Bus Fault................................................................................. 5-60
5.6 Bus Synchronization................................................................................ 5-62
5.7 Bus Arbitration......................................................................................... 5-62
5.7.1 MC68020 Bus Arbitration .................................................................... 5-63
5.7.1.1 Bus Request (MC68020) ................................................................. 5-66
5.7.1.2 Bus Grant (MC68020)...................................................................... 5-66
5.7.1.3 Bus Grant Acknowledge (MC68020) ............................................... 5-66
5.7.1.4 Bus Arbitration Control (MC68020).................................................. 5-67
5.7.2 MC68EC020 Bus Arbitration ............................................................... 5-70
5.7.2.1 Bus Request (MC68EC020) ............................................................ 5-71
5.7.2.2 Bus Grant (MC68EC020)................................................................. 5-71
5.7.2.3 Bus Arbitration Control (MC68EC020)............................................. 5-73
5.8 Reset Operation ...................................................................................... 5-76
Section 6
Exception Processing
6.1 Exception Processing Sequence ............................................................ 6-1
6.1.1 Reset Exception................................................................................... 6-4
6.1.2 Bus Error Exception............................................................................. 6-4
6.1.3 Address Error Exception...................................................................... 6-6
6.1.4 Instruction Trap Exception................................................................... 6-6
6.1.5 Illegal Instruction and Unimplemented Instruction Exceptions ............ 6-7
6.1.6 Privilege Violation Exception ............................................................... 6-8
6.1.7 Trace Exception................................................................................... 6-9
6.1.8 Format Error Exception ....................................................................... 6-10
6.1.9 Interrupt Exceptions............................................................................. 6-11
6.1.10 Breakpoint Instruction Exception......................................................... 6-17
6.1.11 Multiple Exceptions.............................................................................. 6-17
6.1.12 Return from Exception......................................................................... 6-19
6.2 Bus Fault Recovery................................................................................. 6-21
6.2.1 Special Status Word (SSW)................................................................. 6-21
6.2.2 Using Software to Complete the Bus Cycles....................................... 6-23
6.2.3 Completing the Bus Cycles with RTE.................................................. 6-24
6.3 Coprocessor Considerations................................................................... 6-25
6.4 Exception Stack Frame Formats............................................................. 6-25